Since some people disapprove of white space cleanups mixed in regular commits

while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 13 insertions, 13 deletions

diff --git a/src/southbridge/intel/i3100/i3100_lpc.c b/src/southbridge/intel/i3100/i3100_lpc.c
index d629e2f144..eaa81e40c7 100644
--- a/src/southbridge/intel/i3100/i3100_lpc.c
+++ b/src/southbridge/intel/i3100/i3100_lpc.c
@@ -230,9 +230,9 @@ static void i3100_power_options(device_t dev) {
   /* avoid #S4 assertions */
   reg8 |= (3 << 4);
   /* minimum asssertion is 1 to 2 RTCCLK */
-  reg8 &= ~(1 << 3);	
+  reg8 &= ~(1 << 3);
   pci_write_config8(dev, GEN_PMCON_3, reg8);
-  printk(BIOS_INFO, "set power %s after power fail\n", pwr_on ? "on" : "off");  
+  printk(BIOS_INFO, "set power %s after power fail\n", pwr_on ? "on" : "off");
 
   /* Set up NMI on errors. */
   reg8 = inb(0x61);
@@ -245,14 +245,14 @@ static void i3100_power_options(device_t dev) {
   /* PCI SERR# Disable for now */
   reg8 |= (1 << 2);
   outb(reg8, 0x61);
-  
+
   reg8 = inb(0x70);
   nmi_option = NMI_OFF;
   get_option(&nmi_option, "nmi");
   if (nmi_option) {
     /* Set NMI. */
     printk(BIOS_INFO, "NMI sources enabled.\n");
-    reg8 &= ~(1 << 7);	
+    reg8 &= ~(1 << 7);
   } else {
     /* Can't mask NMI from PCI-E and NMI_NOW */
     printk(BIOS_INFO, "NMI sources disabled.\n");
@@ -267,7 +267,7 @@ static void i3100_power_options(device_t dev) {
   /* CLKRUN_EN */
   // reg16 |= (1 << 2);
   pci_write_config16(dev, GEN_PMCON_1, reg16);
-  
+
   // Set the board's GPI routing.
   // i82801gx_gpi_routing(dev);
 }
@@ -321,7 +321,7 @@ static void lpc_init(struct device *dev)
 
 	// TODO this code sets int 0 of the IOAPIC in Virtual Wire Mode
 	// (register 0x10/0x11) while the old code used int 1 (register 0x12)
-	// ... Why? 
+	// ... Why?
 	setup_ioapic(IO_APIC_ADDR, 0); // Don't rename IOAPIC ID
 
 	/* Decode 0xffc00000 - 0xffffffff to fwh idsel 0 */
diff --git a/src/southbridge/intel/i3100/i3100_sata.c b/src/southbridge/intel/i3100/i3100_sata.c
index cafb68fe0d..14c13da290 100644
--- a/src/southbridge/intel/i3100/i3100_sata.c
+++ b/src/southbridge/intel/i3100/i3100_sata.c
@@ -73,29 +73,29 @@ static void sata_init(struct device *dev)
 
 	  /* IDE I/O configuration */
 	  pci_write_config32(dev, SATA_IIOC, 0);
-	  
+
 	} else {
 	  /* SATA configuration */
 	  pci_write_config8(dev, SATA_CMD, 0x07);
 	  pci_write_config8(dev, SATA_PI, 0x8f);
-	  
+
 	  /* Set timings */
 	  pci_write_config16(dev, SATA_PTIM, 0x0a307);
 	  pci_write_config16(dev, SATA_STIM, 0x0a307);
-	  
+
 	  /* Sync DMA */
 	  pci_write_config8(dev, SATA_SYNCC, 0x0f);
 	  pci_write_config16(dev, SATA_SYNCTIM, 0x1111);
-	  
+
 	  /* Fast ATA */
 	  pci_write_config16(dev, SATA_IIOC, 0x1000);
-	  
+
 	  /* Select IDE mode */
 	  pci_write_config8(dev, SATA_MAP, 0x00);
-	  
+
 	  /* Enable ports 0-3 */
 	  pci_write_config8(dev, SATA_PCS + 1, 0x0f);
-	  
+
 	}
 	printk(BIOS_DEBUG, "SATA Enabled\n");
 }