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| author | Sven Schnelle <svens@stackframe.org> | 2012-06-20 16:25:55 +0200 |
|---|---|---|
| committer | Sven Schnelle <svens@stackframe.org> | 2012-06-21 08:47:42 +0200 |
| commit | dab6bfe97d3588b73f7a3f7b9411cfa0e221f916 (patch) | |
| tree | 57628bff63c33ea60e2b521155245507527f18e1 /src/southbridge/intel/i3100 | |
| parent | 2e33a65a8c115a46fdf6101ac57fd89602d1b264 (diff) | |
| download | coreboot-dab6bfe97d3588b73f7a3f7b9411cfa0e221f916.tar.xz | |
i3100: Enable second IOAPIC for PCI-X
i3100/i5000 have a second IOAPIC which handles IRQs for PCI-X.
Add code to enable it.
Change-Id: Ib447628f501b152c8adc9c7c89bd09b5615b9e5a
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1118
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i3100')
| -rw-r--r-- | src/southbridge/intel/i3100/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/i3100/ioapic.c | 61 |
2 files changed, 62 insertions, 0 deletions
diff --git a/src/southbridge/intel/i3100/Makefile.inc b/src/southbridge/intel/i3100/Makefile.inc index fa6caf1b52..ddcb0f9181 100644 --- a/src/southbridge/intel/i3100/Makefile.inc +++ b/src/southbridge/intel/i3100/Makefile.inc @@ -5,5 +5,6 @@ driver-y += sata.c driver-y += ehci.c driver-y += smbus.c driver-y += pci.c +driver-y += ioapic.c ramstage-y += reset.c ramstage-y += pciexp_portb.c diff --git a/src/southbridge/intel/i3100/ioapic.c b/src/southbridge/intel/i3100/ioapic.c new file mode 100644 index 0000000000..446be9e638 --- /dev/null +++ b/src/southbridge/intel/i3100/ioapic.c @@ -0,0 +1,61 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ + +#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> +#include "i3100.h" + + +static void read_resources(struct device *dev) +{ + u32 tmp; + + /* Enable IO(X)APIC config space */ + tmp = pci_read_config16(dev, 0x40); + pci_write_config16(dev, 0x40, tmp & ~(1 << 13)); + /* Enable I/O APIC space at 0xfec80000 */ + dev->path.pci.devfn |= 1; + pci_write_config16(dev, 0x04, 0x06); + pci_write_config32(dev, 0x10, 0xfec80000); + dev->path.pci.devfn &= ~1; + pci_write_config16(dev, 0x40, tmp); + + pci_bus_read_resources(dev); +} + +static struct device_operations pci_ops = { + .read_resources = read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_bus_enable_resources, + .scan_bus = pci_scan_bridge, + .reset_bus = pci_bus_reset, + .ops_pci = 0, + +}; + +static const struct pci_driver pci_driver0 __pci_driver = { + .ops = &pci_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .device = 0x3500, +}; + |