summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i3100
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2016-08-21 18:36:06 +0200
committerMartin Roth <martinroth@google.com>2016-08-28 18:26:07 +0200
commit70d79a454676b551f3bc2059217179e31905ee5c (patch)
tree1a27cd7c57a9d46d0c7d6e7aaeb361c73dfac872 /src/southbridge/intel/i3100
parent03b040b95f1a16d07b98e15c1aeef77ec7a4eca9 (diff)
downloadcoreboot-70d79a454676b551f3bc2059217179e31905ee5c.tar.xz
src/southbridge: Add required space before opening parenthesis '('
Change-Id: I43b9b86fd51dbdc50108026099c60238f3012cbe Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16290 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker
Diffstat (limited to 'src/southbridge/intel/i3100')
-rw-r--r--src/southbridge/intel/i3100/lpc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/i3100/lpc.c b/src/southbridge/intel/i3100/lpc.c
index 4d529ca093..77853a8631 100644
--- a/src/southbridge/intel/i3100/lpc.c
+++ b/src/southbridge/intel/i3100/lpc.c
@@ -200,13 +200,13 @@ static void i3100_pirq_init(device_t dev)
/* Get the chip configuration */
config = dev->chip_info;
- if(config->pirq_a_d)
+ if (config->pirq_a_d)
pci_write_config32(dev, 0x60, config->pirq_a_d);
- if(config->pirq_e_h)
+ if (config->pirq_e_h)
pci_write_config32(dev, 0x68, config->pirq_e_h);
- for(irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
+ for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
u8 int_pin=0, int_line=0;
if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI)