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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-07 16:24:28 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-07 16:24:28 +0000 |
| commit | 6798b478027cb3fd44d52706ad69dee29bae19ba (patch) | |
| tree | a6cb5f73d04d009d7187a1bd0cf65878857166a0 /src/southbridge/intel/i82371eb/Kconfig | |
| parent | 6f2d20ec490a276a087acad0b3866c0f3ee844c4 (diff) | |
| download | coreboot-6798b478027cb3fd44d52706ad69dee29bae19ba.tar.xz | |
Convert all Intel 82371AB/EB/MB based boards to TINY_BOOTBLOCK.
Also:
Unfortunately Intel 440BX + 82371AB/EB/MB boards can have their ISA device
on various PCI bus:device.function locations.
Examples we encountered: 00:07.0, 00:04.0, or 00:14.0.
Thus, instead of hardcoding PCI bus:device.function numbers such as
PCI_DEV(0, 7, 0), we now simply find the ISA device via PCI IDs, which
works the same on all boards.
As an additional benefit this patch also gets rid of one .c file include
in romstage.c.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5918 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb/Kconfig')
| -rw-r--r-- | src/southbridge/intel/i82371eb/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82371eb/Kconfig b/src/southbridge/intel/i82371eb/Kconfig index bda72cf2f4..cd457c2e37 100644 --- a/src/southbridge/intel/i82371eb/Kconfig +++ b/src/southbridge/intel/i82371eb/Kconfig @@ -1,4 +1,10 @@ config SOUTHBRIDGE_INTEL_I82371EB bool select IOAPIC + select TINY_BOOTBLOCK + +config BOOTBLOCK_SOUTHBRIDGE_INIT + string + default "southbridge/intel/i82371eb/bootblock.c" + depends on SOUTHBRIDGE_INTEL_I82371EB |