After finding the missing bit poweroff works now.

I cleaned up the patch and moved most of the dsdt.dsl and
acpi_tables.c into the southbrige/northbridge directory.
Updated patch should fix abuild error and incorporates suggestions
on irc by uwe (thanks for the comments).
Thanks to Idwer Vollering <vidwer@gmail.com> for the original patch.

Tested:
  Linux (poweroff, powerbutton event)
  XP (poweroff, powerbutton event)

Abuild-tested

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 173 insertions, 0 deletions

diff --git a/src/southbridge/intel/i82371eb/acpi/isabridge.asl b/src/southbridge/intel/i82371eb/acpi/isabridge.asl
new file mode 100644
index 0000000000..9640a523d1
--- /dev/null
+++ b/src/southbridge/intel/i82371eb/acpi/isabridge.asl
@@ -0,0 +1,94 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com>
+ * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/*
+ * ISA portions taken from QEMU acpi-dsdt.dsl.
+ */
+
+// Intel LPC Bus Device  - 0:4.0
+Device (LPCB)
+{
+	Name(_ADR, 0x00040000)
+
+	OperationRegion(PCIC, PCI_Config, 0x00, 0x100)
+
+	/* PS/2 keyboard (seems to be important for WinXP install) */
+	Device (KBD)
+	{
+		Name (_HID, EisaId ("PNP0303"))
+		Method (_STA, 0, NotSerialized)
+		{
+			Return (0x0f)
+		}
+		Method (_CRS, 0, NotSerialized)
+		{
+			Name (TMP, ResourceTemplate () {
+				IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
+				IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
+				IRQNoFlags () {1}
+			})
+			Return (TMP)
+		}
+	}
+
+	/* PS/2 mouse */
+	Device (MOU)
+	{
+		Name (_HID, EisaId ("PNP0F13"))
+		Method (_STA, 0, NotSerialized)
+		{
+			Return (0x0f)
+		}
+		Method (_CRS, 0, NotSerialized)
+		{
+			Name (TMP, ResourceTemplate () {
+			     IRQNoFlags () {12}
+			})
+			Return (TMP)
+		}
+	}
+
+	/* PS/2 floppy controller */
+	Device (FDC0)
+	{
+		Name (_HID, EisaId ("PNP0700"))
+		Method (_STA, 0, NotSerialized)
+		{
+			Return (0x0f)
+		}
+		Method (_CRS, 0, NotSerialized)
+		{
+			Name (BUF0, ResourceTemplate () {
+				IO (Decode16, 0x03F2, 0x03F2, 0x00, 0x04)
+				IO (Decode16, 0x03F7, 0x03F7, 0x00, 0x01)
+				IRQNoFlags () {6}
+				DMA (Compatibility, NotBusMaster, Transfer8) {2}
+			})
+			Return (BUF0)
+		}
+	}
+}
+
+Device(MBRS) {
+	Name (_HID, EisaId ("PNP0C02"))
+	Name (_UID, 0x01)
+
+	External(_CRS) /* Resource Template in SSDT */
+}
diff --git a/src/southbridge/intel/i82371eb/acpi/pirq.asl b/src/southbridge/intel/i82371eb/acpi/pirq.asl
new file mode 100644
index 0000000000..8b25fd8069
--- /dev/null
+++ b/src/southbridge/intel/i82371eb/acpi/pirq.asl
@@ -0,0 +1,79 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Tobias Diedrich <ranma+coreboot@tdiedrich.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+Field (\_SB.PCI0.LPCB.PCIC, AnyAcc, NoLock, Preserve)
+{
+	Offset (0x60),	// Interrupt Routing Registers
+	PRTA,	8,
+	PRTB,	8,
+	PRTC,	8,
+	PRTD,	8,
+}
+
+Name(IRQB, ResourceTemplate(){
+	IRQ(Level,ActiveLow,Shared){15}
+})
+
+Name(IRQP, ResourceTemplate(){
+	IRQ(Level,ActiveLow,Exclusive){3, 4, 5, 6, 7, 10, 11, 12}
+})
+
+/* adapted from ma78gm/dsdt.asl */
+#define PCI_INTX_DEV(intx, pinx, uid)			\
+Device(intx) {						\
+	Name(_HID, EISAID("PNP0C0F"))			\
+	Name(_UID, uid)					\
+							\
+	Method(_STA, 0) {				\
+		If (And(pinx, 0x80)) {			\
+			Return(0x09)			\
+		}					\
+		Return(0x0B)				\
+	}						\
+							\
+	Method(_DIS ,0) {				\
+		Store(0x80, pinx)			\
+	}						\
+							\
+	Method(_PRS ,0) {				\
+		Return(IRQP)				\
+	}						\
+							\
+	Method(_CRS ,0) {				\
+		CreateWordField(IRQB, 1, IRQN)		\
+		ShiftLeft(1, And(pinx, 0x0f), IRQN)	\
+		Return(IRQB)				\
+	}						\
+							\
+	Method(_SRS, 1) {				\
+		CreateWordField(ARG0, 1, IRQM)		\
+							\
+		/* Use lowest available IRQ */		\
+		FindSetRightBit(IRQM, Local0)		\
+		if (Local0) {				\
+			Decrement(Local0)		\
+		}					\
+		Store(Local0, pinx)			\
+	}						\
+}							\
+
+PCI_INTX_DEV(LNKA, PRTA, 1)
+PCI_INTX_DEV(LNKB, PRTB, 2)
+PCI_INTX_DEV(LNKC, PRTC, 3)
+PCI_INTX_DEV(LNKD, PRTD, 4)