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| author | Tobias Diedrich <ranma+coreboot@tdiedrich.de> | 2010-11-27 09:40:16 +0000 |
|---|---|---|
| committer | Tobias Diedrich <ranma@tdiedrich.de> | 2010-11-27 09:40:16 +0000 |
| commit | e87c38e0af8b5eca8b7482e52a2a6f15388cedfe (patch) | |
| tree | d428a2d2839fd0cc130d6c71db3414d5d3f2e4fc /src/southbridge/intel/i82371eb/chip.h | |
| parent | 39124dd6c5f577861c16b947088ac1fd31169b8f (diff) | |
| download | coreboot-e87c38e0af8b5eca8b7482e52a2a6f15388cedfe.tar.xz | |
After finding the missing bit poweroff works now.
I cleaned up the patch and moved most of the dsdt.dsl and
acpi_tables.c into the southbrige/northbridge directory.
Updated patch should fix abuild error and incorporates suggestions
on irc by uwe (thanks for the comments).
Thanks to Idwer Vollering <vidwer@gmail.com> for the original patch.
Tested:
Linux (poweroff, powerbutton event)
XP (poweroff, powerbutton event)
Abuild-tested
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb/chip.h')
| -rw-r--r-- | src/southbridge/intel/i82371eb/chip.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82371eb/chip.h b/src/southbridge/intel/i82371eb/chip.h index 2be0f4ffdf..1cb2929346 100644 --- a/src/southbridge/intel/i82371eb/chip.h +++ b/src/southbridge/intel/i82371eb/chip.h @@ -34,6 +34,10 @@ struct southbridge_intel_i82371eb_config { int ide1_drive1_udma33_enable:1; int ide_legacy_enable:1; int usb_enable:1; + /* acpi */ + u32 gpo; /* gpio output default */ + u8 lid_polarity; + u8 thrm_polarity; }; #endif /* SOUTHBRIDGE_INTEL_I82371EB_CHIP_H */ |