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author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-09 17:00:18 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-09 17:00:18 +0000 |
commit | 115c5b982495f8495968e0ea4fd77f63df6e5d71 (patch) | |
tree | 648358b1daa5aea9297eb0c1610a32275f152875 /src/southbridge/intel/i82371eb/i82371eb.h | |
parent | 53b52f356abe8212f8b06b14c3237ca05b71d597 (diff) | |
download | coreboot-115c5b982495f8495968e0ea4fd77f63df6e5d71.tar.xz |
Remove various .c #includes from Intel 440BX/82371EB boards.
- Use 'romstage-y' to turn i82371eb_early_pm.c and i82371eb_early_smbus.c
into distinct compilation units, and don't #include the files anymore
in romstage.c files.
- Ditto for lib/debug.c, northbridge/intel/i440bx/raminit.c, and
northbridge/intel/i440bx/debug.c.
- Add various header files which are now needed.
- Make functions that need to be visible non-static.
- Drop a remaining "select ROMCC" from a 4440BX board.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb/i82371eb.h')
-rw-r--r-- | src/southbridge/intel/i82371eb/i82371eb.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index 1093766dbe..0536c54541 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -21,10 +21,17 @@ #ifndef SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H #define SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H +#if !defined(ASSEMBLY) #if !defined(__PRE_RAM__) + +#include <arch/io.h> +#include <device/device.h> #include "chip.h" + void i82371eb_enable(device_t dev); void i82371eb_hard_reset(void); + +#endif #endif /* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the @@ -55,6 +62,8 @@ void i82371eb_hard_reset(void); #define PMBA 0x40 /* Power management base address */ #define PMREGMISC 0x80 /* Miscellaneous power management */ +#define PM_IO_BASE 0xe400 + /* Bit definitions */ #define EXT_BIOS_ENABLE_1MB (1 << 9) /* 1-Meg Extended BIOS Enable */ #define EXT_BIOS_ENABLE (1 << 7) /* Extended BIOS Enable */ |