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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-09 17:00:18 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-09 17:00:18 +0000 |
| commit | 115c5b982495f8495968e0ea4fd77f63df6e5d71 (patch) | |
| tree | 648358b1daa5aea9297eb0c1610a32275f152875 /src/southbridge/intel/i82371eb/i82371eb_early_smbus.c | |
| parent | 53b52f356abe8212f8b06b14c3237ca05b71d597 (diff) | |
| download | coreboot-115c5b982495f8495968e0ea4fd77f63df6e5d71.tar.xz | |
Remove various .c #includes from Intel 440BX/82371EB boards.
- Use 'romstage-y' to turn i82371eb_early_pm.c and i82371eb_early_smbus.c
into distinct compilation units, and don't #include the files anymore
in romstage.c files.
- Ditto for lib/debug.c, northbridge/intel/i440bx/raminit.c, and
northbridge/intel/i440bx/debug.c.
- Add various header files which are now needed.
- Make functions that need to be visible non-static.
- Drop a remaining "select ROMCC" from a 4440BX board.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb/i82371eb_early_smbus.c')
| -rw-r--r-- | src/southbridge/intel/i82371eb/i82371eb_early_smbus.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c index 76ae9f50b2..0ae5667e86 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c +++ b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c @@ -18,28 +18,29 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* TODO: Implement smbus_write_byte(), smbus_recv_byte(), smbus_send_byte(). */ - #include <stdint.h> +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <console/console.h> #include <device/pci_ids.h> +#include <device/pci_def.h> #include "i82371eb.h" #include "i82371eb_smbus.h" #define SMBUS_IO_BASE 0x0f00 -static void enable_smbus(void) +int smbus_read_byte(u8 device, u8 address); + +void enable_smbus(void) { device_t dev; u8 reg8; u16 reg16; - /* Check for SMBus/PM device PCI ID on the 82371AB/EB/MB. */ + /* Get the SMBus/PM device of the 82371AB/EB/MB. */ dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_SMB_ACPI), 0); - if (dev == PCI_DEV_INVALID) - die("SMBus/PM controller not found\n"); - /* Set the SMBus I/O base. */ pci_write_config32(dev, SMBBA, SMBUS_IO_BASE | 1); @@ -57,7 +58,7 @@ static void enable_smbus(void) outb(inb(SMBUS_IO_BASE + SMBHST_STATUS), SMBUS_IO_BASE + SMBHST_STATUS); } -static int smbus_read_byte(u8 device, u8 address) +int smbus_read_byte(u8 device, u8 address) { return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } |