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authorUwe Hermann <uwe@hermann-uwe.de>2007-06-03 16:57:27 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-06-03 16:57:27 +0000
commit56a9125453cff37477d638e9266f0bd55bdd8528 (patch)
tree560ef5d4acaa1c8e5f3d1a18b22978a8b9d42033 /src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
parentf027280d39d58fa145a0c966ed6c3068de54cdbf (diff)
downloadcoreboot-56a9125453cff37477d638e9266f0bd55bdd8528.tar.xz
Intel 82371EB: Some code simplifications (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2707 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb/i82371eb_early_smbus.c')
-rw-r--r--src/southbridge/intel/i82371eb/i82371eb_early_smbus.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
index ab0b51e52e..7ef268d654 100644
--- a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
+++ b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
@@ -49,9 +49,9 @@ static void enable_smbus(void)
pci_write_config8(dev, SMBHSTCFG, reg8);
/* Enable access to the SMBus I/O space. */
- reg16 = pci_read_config16(dev, PCICMD);
+ reg16 = pci_read_config16(dev, PCI_COMMAND);
reg16 |= IOSE;
- pci_write_config16(dev, PCICMD, reg16);
+ pci_write_config16(dev, PCI_COMMAND, reg16);
/* Clear any lingering errors, so the transaction will run. */
outb(inb(SMBUS_IO_BASE + SMBHST_STATUS), SMBUS_IO_BASE + SMBHST_STATUS);