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author | Patrick Georgi <pgeorgi@google.com> | 2020-03-03 17:05:25 +0000 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-06 07:48:46 +0000 |
commit | 17dda3adb3850bdebc94aca693405e753f6910ab (patch) | |
tree | 5be147a030e4e37b62b320366d44923b2e6aec7d /src/southbridge/intel/i82371eb/ide.c | |
parent | 11f0079c5ac0c5e98682f3ce67763e684433c7f8 (diff) | |
download | coreboot-17dda3adb3850bdebc94aca693405e753f6910ab.tar.xz |
Revert "i82371eb: Drop support for older PIIX chips"
This reverts commit 2b9004de602f98a404b17584ab3e1451f165c1f4.
Reason for revert: QEMU emulates that chipset and with that commit a Linux guest kernel can't find IDE devices anymore.
Change-Id: Iad75af4ea9993d6a2ec5433ad30d39900dab874e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39238
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Keith Hui <buurin@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82371eb/ide.c')
-rw-r--r-- | src/southbridge/intel/i82371eb/ide.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82371eb/ide.c b/src/southbridge/intel/i82371eb/ide.c index 1b8136a9ca..7a72a6552d 100644 --- a/src/southbridge/intel/i82371eb/ide.c +++ b/src/southbridge/intel/i82371eb/ide.c @@ -119,6 +119,18 @@ static void ide_init_udma33(struct device *dev) } /** + * IDE init for the Intel 82371FB/SB IDE controller. + * + * These devices do not support UDMA/33, so don't attempt to enable it. + * + * @param dev The device to use. + */ +static void ide_init_i82371fb_sb(struct device *dev) +{ + ide_init_enable(dev); +} + +/** * IDE init for the Intel 82371AB/EB/MB IDE controller. * * @param dev The device to use. @@ -129,6 +141,17 @@ static void ide_init_i82371ab_eb_mb(struct device *dev) ide_init_udma33(dev); } +/* Intel 82371FB/SB */ +static const struct device_operations ide_ops_fb_sb = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = ide_init_i82371fb_sb, + .scan_bus = 0, + .enable = 0, + .ops_pci = 0, /* No subsystem IDs on 82371XX! */ +}; + /* Intel 82371AB/EB/MB */ static const struct device_operations ide_ops_ab_eb_mb = { .read_resources = pci_dev_read_resources, @@ -140,6 +163,34 @@ static const struct device_operations ide_ops_ab_eb_mb = { .ops_pci = 0, /* No subsystem IDs on 82371XX! */ }; +/* Intel 82371FB (PIIX) */ +static const struct pci_driver ide_driver_fb __pci_driver = { + .ops = &ide_ops_fb_sb, + .vendor = PCI_VENDOR_ID_INTEL, + .device = PCI_DEVICE_ID_INTEL_82371FB_IDE, +}; + +/* Intel 82371SB (PIIX3) */ +static const struct pci_driver ide_driver_sb __pci_driver = { + .ops = &ide_ops_fb_sb, + .vendor = PCI_VENDOR_ID_INTEL, + .device = PCI_DEVICE_ID_INTEL_82371SB_IDE, +}; + +/* Intel 82371MX (MPIIX) */ +static const struct pci_driver ide_driver_mx __pci_driver = { + .ops = &ide_ops_fb_sb, + .vendor = PCI_VENDOR_ID_INTEL, + .device = PCI_DEVICE_ID_INTEL_82371MX_ISA_IDE, +}; + +/* Intel 82437MX (part of the 430MX chipset) */ +static const struct pci_driver ide_driver_82437mx __pci_driver = { + .ops = &ide_ops_fb_sb, + .vendor = PCI_VENDOR_ID_INTEL, + .device = PCI_DEVICE_ID_INTEL_82437MX_ISA_IDE, +}; + /* Intel 82371AB/EB/MB */ static const struct pci_driver ide_driver_ab_eb_mb __pci_driver = { .ops = &ide_ops_ab_eb_mb, |