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| author | Angel Pons <th3fanbus@gmail.com> | 2020-06-08 01:39:25 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-09 17:52:29 +0000 |
| commit | 4a9569a1230935e20adfca0762be50dcae97487e (patch) | |
| tree | 746508e6db96b9021e80ebc538b924d4c9f72898 /src/southbridge/intel/i82371eb | |
| parent | 26886076f40ef92bf2785a9d8363fc4294793644 (diff) | |
| download | coreboot-4a9569a1230935e20adfca0762be50dcae97487e.tar.xz | |
nb/intel/x4x: Use PCI bitwise ops
Tested with BUILD_TIMELESS=1, Intel DG43GT does not change.
Change-Id: I1bb7a7fd808cbbb45efbbfb9581c6a948323a48f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42155
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82371eb')
0 files changed, 0 insertions, 0 deletions