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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-12-07 19:16:07 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-12-07 19:16:07 +0000 |
| commit | 4028ce7b768c9b33e4b0b1af20eede9968359071 (patch) | |
| tree | f01d319ad08b5611b2bdf95c7f426d5f993635d3 /src/southbridge/intel/i82371eb | |
| parent | 7f20d73eba22babbc5bf9efd8df8a3e9d3a117c7 (diff) | |
| download | coreboot-4028ce7b768c9b33e4b0b1af20eede9968359071.tar.xz | |
Get rid of some unneeded function prototypes in romstage.c files.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb')
4 files changed, 7 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index 2fcad8d6ee..709b8327a8 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -36,6 +36,12 @@ void i82371eb_hard_reset(void); #endif #endif +#if defined(__PRE_RAM__) && !defined(__ROMCC__) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); +void enable_pm(void); +#endif + /* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the * 'reg' variable, otherwise it clears those bits. * diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_pm.c b/src/southbridge/intel/i82371eb/i82371eb_early_pm.c index 66c2712b7b..5e52985428 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_early_pm.c +++ b/src/southbridge/intel/i82371eb/i82371eb_early_pm.c @@ -26,8 +26,6 @@ #include <console/console.h> #include "i82371eb.h" -void enable_pm(void); - void enable_pm(void) { device_t dev; diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c index b7c79075eb..8505762933 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c +++ b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c @@ -27,8 +27,6 @@ #include "i82371eb.h" #include "i82371eb_smbus.h" -int smbus_read_byte(u8 device, u8 address); - void enable_smbus(void) { device_t dev; diff --git a/src/southbridge/intel/i82371eb/i82371eb_smbus.h b/src/southbridge/intel/i82371eb/i82371eb_smbus.h index 54e7906223..f82f2edc73 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_smbus.h +++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.h @@ -1,4 +1,5 @@ #include <device/smbus_def.h> +#include "i82371eb.h" #define SMBHST_STATUS 0x0 #define SMBHST_CTL 0x2 @@ -10,7 +11,6 @@ #define SMBUS_STATUS_MASK 0x1e #define SMBUS_ERROR_FLAG (1<<2) -void enable_smbus(void); int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address); static inline void smbus_delay(void) |