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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-10-26 10:12:15 +1100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2014-11-05 14:41:47 +0100 |
| commit | 9a817ef183177d4d9ce6fc37b26e00e147d29cd1 (patch) | |
| tree | ac82e5076836ce20224b2e8babee9955138cf41e /src/southbridge/intel/i82371eb | |
| parent | 169c0df6b8f07268e3bc49f35520df692705f5d8 (diff) | |
| download | coreboot-9a817ef183177d4d9ce6fc37b26e00e147d29cd1.tar.xz | |
soutbridge/*/bootblock: Use pci_dev_t over device_t typedef
Change-Id: I693b09d588ed6d56177cf86c23497231623b69c0
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7193
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/i82371eb')
| -rw-r--r-- | src/southbridge/intel/i82371eb/bootblock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c index b350bde6a9..67afc1ca1a 100644 --- a/src/southbridge/intel/i82371eb/bootblock.c +++ b/src/southbridge/intel/i82371eb/bootblock.c @@ -26,7 +26,7 @@ static void i82371eb_enable_rom(void) { u16 reg16; - device_t dev; + pci_devfn_t dev; /* * Note: The Intel 82371AB/EB/MB ISA device can be on different |