Convert all Intel 440BX boards to Cache-as-RAM (CAR).

 - Add "select CACHE_AS_RAM" in src/cpu/intel/slot_1/Kconfig.

 - Add the following in src/cpu/intel/slot_1/Makefile.inc:
   cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc

 - Remove "select ROMCC" from all 440BX board Kconfig files.

 - Drop all early_mtrr_init() calls, that's done by CAR code now.

Various small fixes were needed to make it build:

 - Drop do_smbus_recv_byte(), do_smbus_send_byte(), do_smbus_write_byte(),
   those were never called anyways.

 - Remove the "static" from the main() functions in romstage.c files.

 - Always call dump_spd_registers() from the 440BX debug.c, but use
   "#if CONFIG_DEBUG_RAM_SETUP" to only have that code if RAM debugging
   is enabled in menuconfig.

 - Drop all "lib/ramtest.c" #includes and ram_check() calls (even if
   commented out) from romstage.c's, as we've done for most other boards.

 - Add missing #includes or prototypes. Some of the prototypes will be
   removed later when we get rid of the #include'd .c files.

Abuild-tested for all boards, and boot-tested on A-Trend ATC-6220.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5917 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 0 insertions, 127 deletions

diff --git a/src/southbridge/intel/i82371eb/i82371eb_smbus.h b/src/southbridge/intel/i82371eb/i82371eb_smbus.h
index 1c6f26a47d..a189425395 100644
--- a/src/southbridge/intel/i82371eb/i82371eb_smbus.h
+++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.h
@@ -63,95 +63,6 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
 	return loops?0:SMBUS_WAIT_UNTIL_DONE_TIMEOUT;
 }
 
-static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device)
-{
-	unsigned global_status_register;
-	unsigned byte;
-
-	if (smbus_wait_until_ready(smbus_io_base) < 0) {
-		return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
-	}
-
-	/* setup transaction */
-	/* disable interrupts */
-	outw(inw(smbus_io_base + SMBHST_CTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBHST_CTL);
-	/* set the device I'm talking too */
-	outw(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHST_ADDR);
-	/* set the command/address... */
-	outb(0, smbus_io_base + SMBHST_CMD);
-	/* set up for a send byte */
-	outw((inw(smbus_io_base + SMBHST_CTL) & ~7) | (0x1), smbus_io_base + SMBHST_CTL);
-
-	/* clear any lingering errors, so the transaction will run */
-	/* Do I need to write the bits to a 1 to clear an error? */
-	outw(inw(smbus_io_base + SMBHST_STATUS), smbus_io_base + SMBHST_STATUS);
-
-	/* set the data word...*/
-	outw(0, smbus_io_base + SMBHST_DAT);
-
-	/* start the command */
-	outw((inw(smbus_io_base + SMBHST_CTL) | (1 << 3)), smbus_io_base + SMBHST_CTL);
-
-
-	/* poll for transaction completion */
-	if (smbus_wait_until_done(smbus_io_base) < 0) {
-		return SMBUS_WAIT_UNTIL_DONE_TIMEOUT;
-	}
-
-	global_status_register = inw(smbus_io_base + SMBHST_STATUS);
-
-	/* read results of transaction */
-	byte = inb(smbus_io_base + SMBHST_DAT) & 0xff;
-
-	// Check for any result other than a command completion
-	if ((global_status_register & SMBUS_STATUS_MASK) != (1 << 1)) {
-		return SMBUS_ERROR;
-	}
-	return byte;
-}
-
-static int do_smbus_send_byte(unsigned smbus_io_base, unsigned device, unsigned value)
-{
-	unsigned global_status_register;
-
-	if (smbus_wait_until_ready(smbus_io_base) < 0) {
-		return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
-	}
-
-	/* setup transaction */
-	/* disable interrupts */
-	outw(inw(smbus_io_base + SMBHST_CTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBHST_CTL);
-	/* set the device I'm talking too */
-	outw(((device & 0x7f) << 1) | 0, smbus_io_base + SMBHST_ADDR);
-	/* set the command/address... */
-	outb(0, smbus_io_base + SMBHST_CMD);
-	/* set up for a send byte */
-	outw((inw(smbus_io_base + SMBHST_CTL) & ~7) | (0x1), smbus_io_base + SMBHST_CTL);
-
-	/* clear any lingering errors, so the transaction will run */
-	/* Do I need to write the bits to a 1 to clear an error? */
-	outw(inw(smbus_io_base + SMBHST_STATUS), smbus_io_base + SMBHST_STATUS);
-
-	/* set the data word...*/
-	outw(value, smbus_io_base + SMBHST_DAT);
-
-	/* start the command */
-	outw((inw(smbus_io_base + SMBHST_CTL) | (1 << 3)), smbus_io_base + SMBHST_CTL);
-
-
-	/* poll for transaction completion */
-	if (smbus_wait_until_done(smbus_io_base) < 0) {
-		return SMBUS_WAIT_UNTIL_DONE_TIMEOUT;
-	}
-	global_status_register = inw(smbus_io_base + SMBHST_STATUS);
-
-	if ((global_status_register & SMBUS_STATUS_MASK) != (1 << 4)) {
-		return SMBUS_ERROR;
-	}
-	return 0;
-}
-
-
 static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address)
 {
 	unsigned status_register;
@@ -199,41 +110,3 @@ static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned
 	return byte;
 }
 
-static int do_smbus_write_byte(unsigned smbus_io_base, unsigned device, unsigned address, unsigned char val)
-{
-	unsigned global_status_register;
-
-	if (smbus_wait_until_ready(smbus_io_base) < 0) {
-		return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
-	}
-
-	/* setup transaction */
-	/* disable interrupts */
-	outw(inw(smbus_io_base + SMBHST_CTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBHST_CTL);
-	/* set the device I'm talking too */
-	outw(((device & 0x7f) << 1) | 0, smbus_io_base + SMBHST_ADDR);
-	outb(address & 0xFF, smbus_io_base + SMBHST_CMD);
-	/* set up for a byte data write */ /* FIXME */
-	outw((inw(smbus_io_base + SMBHST_CTL) & ~7) | (0x2), smbus_io_base + SMBHST_CTL);
-	/* clear any lingering errors, so the transaction will run */
-	/* Do I need to write the bits to a 1 to clear an error? */
-	outw(inw(smbus_io_base + SMBHST_STATUS), smbus_io_base + SMBHST_STATUS);
-
-	/* write the data word...*/
-	outw(val, smbus_io_base + SMBHST_DAT);
-
-	/* start the command */
-	outw((inw(smbus_io_base + SMBHST_CTL) | (1 << 3)), smbus_io_base + SMBHST_CTL);
-
-	/* poll for transaction completion */
-	if (smbus_wait_until_done(smbus_io_base) < 0) {
-		return SMBUS_WAIT_UNTIL_DONE_TIMEOUT;
-	}
-	global_status_register = inw(smbus_io_base + SMBHST_STATUS);
-
-	if ((global_status_register & SMBUS_STATUS_MASK) != (1 << 1)) {
-		return SMBUS_ERROR;
-	}
-	return 0;
-}
-