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| author | Scott Duplichan <scott@notabs.org> | 2010-09-17 21:38:40 +0000 |
|---|---|---|
| committer | Marc Jones <marc.jones@amd.com> | 2010-09-17 21:38:40 +0000 |
| commit | 78301d02b01d01302e6f9ce95db1e59c360a0ba9 (patch) | |
| tree | 50760e76bf88020342759aad7f5b452911657e42 /src/southbridge/intel/i82371eb | |
| parent | 01d56d4276c800f4aa53acd657aed24676a52f4d (diff) | |
| download | coreboot-78301d02b01d01302e6f9ce95db1e59c360a0ba9.tar.xz | |
AMD Fam10 code breaks with gcc 4.5.0.
Root cause: After function STOP_CAR_AND_CPU disables cache as
ram, the cache as ram stack can no longer be used. Called
functions must be inlined to avoid stack usage. Also, the
compiler must keep local variables register based and not
allocated them from the stack. With gcc 4.5.0, some functions
declared as inline are not being inlined. This patch forces
these functions to always be inlined by adding the qualifier
__attribute__((always_inline)) to their declaration.
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5818 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb')
0 files changed, 0 insertions, 0 deletions