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| author | Nico Huber <nico.huber@secunet.com> | 2019-03-14 16:02:05 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-10-08 12:59:56 +0000 |
| commit | 51b75ae50aaa92f01c478ac086ef4a7dec352f7f (patch) | |
| tree | 0aacb7055be64e950994831bedeb94bbbaec6ae6 /src/southbridge/intel/i82371eb | |
| parent | a89c82e40210f4b61445bffdfec13cc08ea57f1f (diff) | |
| download | coreboot-51b75ae50aaa92f01c478ac086ef4a7dec352f7f.tar.xz | |
device: Use scan_static_bus() over scan_lpc_bus()
Devices behind LPC can expose more buses (e.g. I2C on a super-i/o).
So we should scan buses on LPC devices, too.
Change-Id: I0eb005e41b9168fffc344ee8e666d43b605a30ba
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29474
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82371eb')
| -rw-r--r-- | src/southbridge/intel/i82371eb/isa.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index 00b3866665..bb88f7ddc0 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -142,7 +142,7 @@ static const struct device_operations isa_ops = { .acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator, #endif .init = isa_init, - .scan_bus = scan_lpc_bus, /* TODO: Needed? */ + .scan_bus = scan_static_bus, .enable = 0, .ops_pci = 0, /* No subsystem IDs on 82371EB! */ }; |