summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801ax/chip.h
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-02-27 01:50:21 +0000
committerStefan Reinauer <stepan@openbios.org>2010-02-27 01:50:21 +0000
commit138be8315b63b0c8955159580d085e7621882b95 (patch)
treeaabbcab390ea1e522524ff7e98d11ac752a051b5 /src/southbridge/intel/i82801ax/chip.h
parentbe07eb29bc087a97903f72c2253442c285ce5942 (diff)
downloadcoreboot-138be8315b63b0c8955159580d085e7621882b95.tar.xz
This does the following:
cd coreboot/src/southbridge svn mv i82801ca i82801cx svn mv i82801dbm i82801dx svn mv i82801er i82801ex svn copy i82801xx i82801bx svn mv i82801xx i82801ax Plus, fixing up the filenames in these directories and the romstage.c and Kconfig files of the mainboards using those drivers. Plus, switching the thomson ip1000 and rca rm4100 to the i82801dx driver. There's a lot more to be done, like - adding device IDs for the ICH3 and newer drivers that have been kept in i82801xx so far - drop the additional parts support from the ax and bx drivers. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5167 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801ax/chip.h')
-rw-r--r--src/southbridge/intel/i82801ax/chip.h58
1 files changed, 58 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801ax/chip.h b/src/southbridge/intel/i82801ax/chip.h
new file mode 100644
index 0000000000..90bbfcb7c5
--- /dev/null
+++ b/src/southbridge/intel/i82801ax/chip.h
@@ -0,0 +1,58 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Corey Osgood <corey_osgood@verizon.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ * The i82801ax code currently supports:
+ * - 82801AA
+ * - 82801AB
+ * - 82801BA
+ * - 82801CA
+ * - 82801DB
+ * - 82801DBM
+ * - 82801EB
+ * - 82801ER
+ *
+ * This code should NOT be used for ICH6 and later versions.
+ */
+
+#ifndef SOUTHBRIDGE_INTEL_I82801AX_CHIP_H
+#define SOUTHBRIDGE_INTEL_I82801AX_CHIP_H
+
+struct southbridge_intel_i82801ax_config {
+ /**
+ * Interrupt Routing configuration
+ * If bit7 is 1, the interrupt is disabled.
+ */
+ uint8_t pirqa_routing;
+ uint8_t pirqb_routing;
+ uint8_t pirqc_routing;
+ uint8_t pirqd_routing;
+ uint8_t pirqe_routing;
+ uint8_t pirqf_routing;
+ uint8_t pirqg_routing;
+ uint8_t pirqh_routing;
+
+ uint8_t ide0_enable;
+ uint8_t ide1_enable;
+};
+
+extern struct chip_operations southbridge_intel_i82801ax_ops;
+
+#endif