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authorSteven J. Magnani <steve@digidescorp.com>2005-09-14 15:34:03 +0000
committerSteven J. Magnani <steve@digidescorp.com>2005-09-14 15:34:03 +0000
commit706aed8eb9c1836d1b6c53b081f789a1d3afaa25 (patch)
tree953355608f5491e7e046a30e0cba007e27522bf9 /src/southbridge/intel/i82801ca/chip.h
parent09e4ef670245566f1ee50759976babac17aae55d (diff)
downloadcoreboot-706aed8eb9c1836d1b6c53b081f789a1d3afaa25.tar.xz
Initial revision.
Based on i82801er and LB v1 code. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801ca/chip.h')
-rw-r--r--src/southbridge/intel/i82801ca/chip.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801ca/chip.h b/src/southbridge/intel/i82801ca/chip.h
new file mode 100644
index 0000000000..f9583ca1fd
--- /dev/null
+++ b/src/southbridge/intel/i82801ca/chip.h
@@ -0,0 +1,9 @@
+#ifndef I82801CA_CHIP_H
+#define I82801CA_CHIP_H
+
+struct southbridge_intel_i82801ca_config
+{
+};
+extern struct chip_operations southbridge_intel_i82801ca_ops;
+
+#endif /* I82801CA_CHIP_H */