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author | Ronald G. Minnich <rminnich@gmail.com> | 2004-08-25 15:40:47 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2004-08-25 15:40:47 +0000 |
commit | e6552bcf3960c7d10fc3730a2d6b408bfc9a8ca9 (patch) | |
tree | 315c692a5dec51c2b5ecc3932eac2975bdc4cb09 /src/southbridge/intel/i82801dbm/i82801dbm.h | |
parent | 3b0096313a3176370aaac91714d7b81dd0163b9a (diff) | |
download | coreboot-e6552bcf3960c7d10fc3730a2d6b408bfc9a8ca9.tar.xz |
changes for the dbm part. Still need to remove the sata file ...
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1639 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801dbm/i82801dbm.h')
-rw-r--r-- | src/southbridge/intel/i82801dbm/i82801dbm.h | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801dbm/i82801dbm.h b/src/southbridge/intel/i82801dbm/i82801dbm.h index f3b06e28ce..5b65e1489b 100644 --- a/src/southbridge/intel/i82801dbm/i82801dbm.h +++ b/src/southbridge/intel/i82801dbm/i82801dbm.h @@ -1,5 +1,13 @@ -#ifndef I82801ER_H -#define I82801ER_H +/* the problem: we have 82801dbm support in fb1, and 82801er in fb2. + * fb1 code is what we want, fb2 structure is needed however. + * so we need to get fb1 code for 82801dbm into fb2 structure. + */ +/* What I did: took the 80801er stuff from fb2, verify it against the + * db stuff in fb1, and made sure it was right. + */ + +#ifndef I82801DBM_H +#define I82801DBM_H struct southbridge_intel_i82801dbm_config { @@ -22,9 +30,6 @@ channel disabled. 111 = Combined. IDE is primary. P0 is secondary slave. P1 is secondary master. */ -#define ICH5_SATA_ADDRESS_MAP 0 - - #define PCI_DMA_CFG 0x90 #define SERIRQ_CNTL 0x64 #define GEN_CNTL 0xd0 |