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| author | Konstantin Aladyshev <aladyshev@nicevt.ru> | 2013-03-07 04:37:02 +0400 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-06-12 01:54:19 +0200 |
| commit | 07c3fc089cc0bcc45b436d92580c279a4386d88c (patch) | |
| tree | 850c6953310bb0996cef93a562aa3b1bb20a4e09 /src/southbridge/intel/i82801dx/smi.c | |
| parent | 550f726d4028c3f29758473da925c8e853272371 (diff) | |
| download | coreboot-07c3fc089cc0bcc45b436d92580c279a4386d88c.tar.xz | |
intel/*/smi.c: Output correct GPIO in ALT_GP_SMI_STS register dump
Mapping is as follows: bit 15 corresponds to GPIO15 ... bit 0 corresponds to
GPIO0.
Change-Id: I661ce56d9373887270ba3c0518892fbbe6d9de7c
Signed-off-by: Konstantin Aladyshev <aladyshev@nicevt.ru>
Reviewed-on: http://review.coreboot.org/3436
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801dx/smi.c')
| -rw-r--r-- | src/southbridge/intel/i82801dx/smi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c index fcf36e1f4d..d2e3e25780 100644 --- a/src/southbridge/intel/i82801dx/smi.c +++ b/src/southbridge/intel/i82801dx/smi.c @@ -177,7 +177,7 @@ static void dump_alt_gp_smi_status(u16 alt_gp_smi_sts) int i; printk(BIOS_DEBUG, "ALT_GP_SMI_STS: "); for (i=15; i>= 0; i--) { - if (alt_gp_smi_sts & (1 << i)) printk(BIOS_DEBUG, "GPI%d ", (i-16)); + if (alt_gp_smi_sts & (1 << i)) printk(BIOS_DEBUG, "GPI%d ", i); } printk(BIOS_DEBUG, "\n"); } |