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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-08-20 20:50:17 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-09-22 18:04:36 +0000 |
| commit | c88e370f851e686b5998fb3a0c44d7ace6dae7c3 (patch) | |
| tree | 39295a1c6dc5ec02da5f7e886acf3f7938136eef /src/southbridge/intel/i82801gx/Makefile.inc | |
| parent | 524d49735518a55e332d62f908891329eb5c721b (diff) | |
| download | coreboot-c88e370f851e686b5998fb3a0c44d7ace6dae7c3.tar.xz | |
sb/intel/common/spi.c: Port to i82801gx
Offsets are a little different.
Change-Id: I39199f3279a8b76e290b6693adc50dc2ac0ccf23
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/21113
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx/Makefile.inc')
| -rw-r--r-- | src/southbridge/intel/i82801gx/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc index bb68d933b6..5b3ba6ae0a 100644 --- a/src/southbridge/intel/i82801gx/Makefile.inc +++ b/src/southbridge/intel/i82801gx/Makefile.inc @@ -27,6 +27,7 @@ ramstage-y += sata.c ramstage-y += smbus.c ramstage-y += usb.c ramstage-y += usb_ehci.c +ramstage-y += ../common/spi.c ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c |