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authorArthur Heymans <arthur@aheymans.xyz>2017-03-09 12:02:52 +0100
committerMartin Roth <martinroth@google.com>2017-03-22 17:55:53 +0100
commit3f111b0b11cf3d14b9aded601b6a1dd84f35a8dc (patch)
treea11b02549c808bd7a59ee762a73bd46561731ea3 /src/southbridge/intel/i82801gx/ac97.c
parent70a8e34853d4b01ab7a2089821c35715c59b4415 (diff)
downloadcoreboot-3f111b0b11cf3d14b9aded601b6a1dd84f35a8dc.tar.xz
southbridge/intel/i82801gx: Fix problems found by checkpatch.pl
Change-Id: Iddc67e7c126ce19429afc24b021e385353564cb8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18705 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx/ac97.c')
-rw-r--r--src/southbridge/intel/i82801gx/ac97.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801gx/ac97.c b/src/southbridge/intel/i82801gx/ac97.c
index ed800ff79d..b86891bddf 100644
--- a/src/southbridge/intel/i82801gx/ac97.c
+++ b/src/southbridge/intel/i82801gx/ac97.c
@@ -96,9 +96,8 @@ static int ac97_semaphore(void)
reg8 = inb(nabmbar + CAS);
timeout--;
} while ((reg8 & 1) && timeout);
- if (! timeout) {
+ if (!timeout)
printk(BIOS_DEBUG, "Timeout!\n");
- }
return (!timeout);
}
@@ -220,7 +219,7 @@ static void ac97_modem_init(struct device *dev)
mbar = pci_read_config16(dev, MBAR) & 0xfffe;
reg16 = inw(mmbar + EXT_MODEM_ID1);
- if ((reg16 & 0xc000) != 0xc000 ) {
+ if ((reg16 & 0xc000) != 0xc000) {
if (reg16 & (1 << 0)) {
reg32 = inw(mmbar + VENDOR_ID2);
reg32 <<= 16;
@@ -247,7 +246,8 @@ static void ac97_modem_init(struct device *dev)
}
}
-static void ac97_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void ac97_set_subsystem(device_t dev, unsigned int vendor,
+ unsigned int device)
{
if (!vendor || !device) {
pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,