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| author | Stefan Reinauer <stepan@coresystems.de> | 2009-01-20 22:53:10 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-01-20 22:53:10 +0000 |
| commit | 54309d637ac2cf474793b884b5392f0a6e5390a9 (patch) | |
| tree | 7d7acb4cb7b4e394ba29eef08c553bd34aeb1193 /src/southbridge/intel/i82801gx/chip.h | |
| parent | 977ed2d99565fc35c52f50cbe310b7b211611e94 (diff) | |
| download | coreboot-54309d637ac2cf474793b884b5392f0a6e5390a9.tar.xz | |
Update Kontron board
- use new features of the ich7 update
- move rambase above 1M to avoid memory trashing through SMM relocation
- enable superio HWM
Update ICH7 driver
- minor smi cosmetics (in progress)
- add real ac97 driver
- add real azalia driver
- fix some interrupt issues
- fix some sata issues
- include Patrick's fix for _lpc.c
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/chip.h')
| -rw-r--r-- | src/southbridge/intel/i82801gx/chip.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/chip.h b/src/southbridge/intel/i82801gx/chip.h index 755c317531..45c011a1c0 100644 --- a/src/southbridge/intel/i82801gx/chip.h +++ b/src/southbridge/intel/i82801gx/chip.h @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2008 coresystems GmbH + * Copyright (C) 2008-2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -22,10 +22,24 @@ #define SOUTHBRIDGE_INTEL_I82801GX_CHIP_H struct southbridge_intel_i82801gx_config { + /* LPC configuration */ + uint8_t pirqa_routing; + uint8_t pirqb_routing; + uint8_t pirqc_routing; + uint8_t pirqd_routing; + uint8_t pirqe_routing; + uint8_t pirqf_routing; + uint8_t pirqg_routing; + uint8_t pirqh_routing; + + /* IDE configuration */ uint32_t ide_legacy_combined; uint32_t ide_enable_primary; uint32_t ide_enable_secondary; uint32_t sata_ahci; + + /* Azalia Configuration */ + unsigned long hda_viddid; }; extern struct chip_operations southbridge_intel_i82801gx_ops; |