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authorStefan Reinauer <stepan@coresystems.de>2009-03-11 14:54:18 +0000
committerStefan Reinauer <stepan@openbios.org>2009-03-11 14:54:18 +0000
commita8e1168064b34b46494b58480411a11bc98340f6 (patch)
tree7d8c27e67ed67a3b96356581bad604b496f7cdd5 /src/southbridge/intel/i82801gx/chip.h
parent6df0c62b688d1c4157bc151f98a2feeeca79fee8 (diff)
downloadcoreboot-a8e1168064b34b46494b58480411a11bc98340f6.tar.xz
This patch contains some significant updates to the i82801gx component and will
be required for a series of later patches. Roughly it contains: * fixed SMBus driver (was not compiled in before) * fixed S-ATA/P-ATA combination * Added warnings to drivers being called with a NULL dev->chip_info * Set subsystem ids for those boards that have none specified in Options.lb * Fix license headers. The code was originally released under GPL v2 but some files sneaked in with a v2 or later header. * some attempts to fix azalia/Intel HDA.. not working yet * clean up and fix pci bridge handling code * Add Config based GPI handling to LPC driver * Add HPET enable function * Enable clock gating where appropriate * first attempt at USB debug console support (not working yet) * Add required options to kontron board * many other minor changes Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/chip.h')
-rw-r--r--src/southbridge/intel/i82801gx/chip.h41
1 files changed, 35 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801gx/chip.h b/src/southbridge/intel/i82801gx/chip.h
index 45c011a1c0..7fca7ca9f3 100644
--- a/src/southbridge/intel/i82801gx/chip.h
+++ b/src/southbridge/intel/i82801gx/chip.h
@@ -3,10 +3,10 @@
*
* Copyright (C) 2008-2009 coresystems GmbH
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -22,7 +22,10 @@
#define SOUTHBRIDGE_INTEL_I82801GX_CHIP_H
struct southbridge_intel_i82801gx_config {
- /* LPC configuration */
+ /**
+ * Interrupt Routing configuration
+ * If bit7 is 1, the interrupt is disabled.
+ */
uint8_t pirqa_routing;
uint8_t pirqb_routing;
uint8_t pirqc_routing;
@@ -32,6 +35,32 @@ struct southbridge_intel_i82801gx_config {
uint8_t pirqg_routing;
uint8_t pirqh_routing;
+ /**
+ * GPI Routing configuration
+ *
+ * Only the lower two bits have a meaning:
+ * 00: No effect
+ * 01: SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
+ * 10: SCI (if corresponding GPIO_EN bit is also set)
+ * 11: reserved
+ */
+ uint8_t gpi0_routing;
+ uint8_t gpi1_routing;
+ uint8_t gpi2_routing;
+ uint8_t gpi3_routing;
+ uint8_t gpi4_routing;
+ uint8_t gpi5_routing;
+ uint8_t gpi6_routing;
+ uint8_t gpi7_routing;
+ uint8_t gpi8_routing;
+ uint8_t gpi9_routing;
+ uint8_t gpi10_routing;
+ uint8_t gpi11_routing;
+ uint8_t gpi12_routing;
+ uint8_t gpi13_routing;
+ uint8_t gpi14_routing;
+ uint8_t gpi15_routing;
+
/* IDE configuration */
uint32_t ide_legacy_combined;
uint32_t ide_enable_primary;
@@ -39,7 +68,7 @@ struct southbridge_intel_i82801gx_config {
uint32_t sata_ahci;
/* Azalia Configuration */
- unsigned long hda_viddid;
+ uint32_t hda_viddid;
};
extern struct chip_operations southbridge_intel_i82801gx_ops;