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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-11 19:12:57 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-14 11:30:09 +0000 |
| commit | 399b6c11efaff64cb86a879dc9047a97538e790f (patch) | |
| tree | ab3a75f247654a8f6c97d75b5dd4d79fe58d3f9e /src/southbridge/intel/i82801gx/i82801gx.h | |
| parent | 949ff57bcaa3bf7e196b36c90124989a36ba93a5 (diff) | |
| download | coreboot-399b6c11efaff64cb86a879dc9047a97538e790f.tar.xz | |
sb/intel/i82801gx: Add common early code
Remove some of the code duplication on i82801gx.
x4x boards are left untouched for now since that northbridge
also supports i82801jx.
The order of some things has changed:
- on i945 early_ich7_init is now done before the raminit
- enabling the IOAPIC is done before the raminit
Change-Id: Ie39549938891e17667a8819b49a78b9c71c8ec9e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36754
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx.h')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 9eea262997..3d27faafad 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -42,6 +42,7 @@ void i82801gx_enable(struct device *dev); void enable_smbus(void); void i82801gx_lpc_setup(void); void i82801gx_setup_bars(void); +void i82801gx_early_init(void); #if ENV_ROMSTAGE int smbus_read_byte(unsigned int device, unsigned int address); |