diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-22 11:42:32 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-22 11:42:32 +0000 |
| commit | c02b4fc9db3c3c1e263027382697b566127f66bb (patch) | |
| tree | 11bd18488e360e5c1beeb9ccb852ef4489c3689a /src/southbridge/intel/i82801gx/i82801gx_pci.c | |
| parent | 27852aba6787617ca5656995cbc7e8ef0a3ea22c (diff) | |
| download | coreboot-c02b4fc9db3c3c1e263027382697b566127f66bb.tar.xz | |
printk_foo -> printk(BIOS_FOO, ...)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_pci.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_pci.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_pci.c b/src/southbridge/intel/i82801gx/i82801gx_pci.c index d9057cb295..c4c22f0ae8 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_pci.c +++ b/src/southbridge/intel/i82801gx/i82801gx_pci.c @@ -71,7 +71,7 @@ static void ich_pci_dev_enable_resources(struct device *dev) /* Set the subsystem vendor and device id for mainboard devices */ ops = ops_pci(dev); if (dev->on_mainboard && ops && ops->set_subsystem) { - printk_debug("%s subsystem <- %02x/%02x\n", + printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n", dev_path(dev), CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); @@ -87,10 +87,10 @@ static void ich_pci_dev_enable_resources(struct device *dev) * this will cause the ROM and APICs not being visible * anymore. */ - printk_debug("%s cmd <- %02x\n", dev_path(dev), command); + printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command); pci_write_config16(dev, PCI_COMMAND, command); #else - printk_debug("%s cmd <- %02x (NOT WRITTEN!)\n", dev_path(dev), command); + printk(BIOS_DEBUG, "%s cmd <- %02x (NOT WRITTEN!)\n", dev_path(dev), command); #endif } @@ -105,7 +105,7 @@ static void ich_pci_bus_enable_resources(struct device *dev) ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); ctrl |= dev->link[0].bridge_ctrl; ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* error check */ - printk_debug("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); + printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); /* This is the reason we need our own pci_bus_enable_resources */ |