diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2008-10-29 04:46:52 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2008-10-29 04:46:52 +0000 |
commit | debb11fc1fe5f5560015ab9905f1ccc2e08c73e0 (patch) | |
tree | 9160cd3787a3213a38f5e9b9942360bcaf753f1a /src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c | |
parent | b70d1993a432af2a026c4cad0fa3dd3c5eca1ef7 (diff) | |
download | coreboot-debb11fc1fe5f5560015ab9905f1ccc2e08c73e0.tar.xz |
Support for the Intel ICH7 southbridge.
This includes an early SMI handler.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c')
-rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c b/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c new file mode 100644 index 0000000000..3d581abb59 --- /dev/null +++ b/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c @@ -0,0 +1,84 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include "i82801gx.h" + +static void usb_ehci_init(struct device *dev) +{ + u32 reg32; + + printk_debug("EHCI: Setting up controller.. "); + reg32 = pci_read_config32(dev, PCI_COMMAND); + pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER); + + reg32 = pci_read_config32(dev, 0xdc); + reg32 |= (1 << 31) | (1 << 27); + pci_write_config32(dev, 0xdc, reg32); + + reg32 = pci_read_config32(dev, 0xfc); + reg32 &= ~(3 << 2); + reg32 |= (2 << 2) | (1 << 29) | (1 << 17); + pci_write_config32(dev, 0xfc, reg32); + + printk_debug("done.\n"); +} + +static void usb_ehci_set_subsystem(device_t dev, unsigned vendor, + unsigned device) +{ + u8 access_cntl; + + access_cntl = pci_read_config8(dev, 0x80); + + /* Enable writes to protected registers. */ + pci_write_config8(dev, 0x80, access_cntl | 1); + + /* Write the subsystem vendor and device ID. */ + pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, + ((device & 0xffff) << 16) | (vendor & 0xffff)); + + /* Restore protection. */ + pci_write_config8(dev, 0x80, access_cntl); +} + +static struct pci_operations lops_pci = { + .set_subsystem = &usb_ehci_set_subsystem, +}; + +static struct device_operations usb_ehci_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = usb_ehci_init, + .scan_bus = 0, + .enable = i82801gx_enable, + .ops_pci = &lops_pci, +}; + +/* 82801Gx */ +static const struct pci_driver i82801ex_usb_ehci __pci_driver = { + .ops = &usb_ehci_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .device = 0x27cc, +}; |