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authorAngel Pons <th3fanbus@gmail.com>2020-05-31 00:03:28 +0200
committerNico Huber <nico.h@gmx.de>2020-06-06 20:36:51 +0000
commit1fc0edd9fe6b8072a87dce769789119e81af978b (patch)
treed4e44ae76f4c7ff4acfe7e0d7909addcd8927d4d /src/southbridge/intel/i82801gx/lpc.c
parentfa276862f2b98f480c2cd2d6948e332756a37d54 (diff)
downloadcoreboot-1fc0edd9fe6b8072a87dce769789119e81af978b.tar.xz
src: Use pci_dev_ops_pci where applicable
Change-Id: Ie004a94a49fc8f53c370412bee1c3e7eacbf8beb Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41944 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/i82801gx/lpc.c')
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index d4aef55f43..0bfe8eb52f 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -653,10 +653,6 @@ static void southbridge_fill_ssdt(const struct device *device)
intel_acpi_gen_def_acpi_pirq(device);
}
-static struct pci_operations pci_ops = {
- .set_subsystem = pci_dev_set_subsystem,
-};
-
static struct device_operations device_ops = {
.read_resources = i82801gx_lpc_read_resources,
.set_resources = pci_dev_set_resources,
@@ -668,7 +664,7 @@ static struct device_operations device_ops = {
.init = lpc_init,
.scan_bus = scan_static_bus,
.enable = i82801gx_enable,
- .ops_pci = &pci_ops,
+ .ops_pci = &pci_dev_ops_pci,
.final = lpc_final,
};