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authorArthur Heymans <arthur@aheymans.xyz>2019-05-28 13:24:15 +0200
committerMartin Roth <martinroth@google.com>2019-07-08 14:53:32 +0000
commitb429c5be15dd4263e8ddb599e1e1f15dd95c3bf0 (patch)
treed11ad98566d8a8a3d2a3e98cde1cc5ae8ca64cb1 /src/southbridge/intel/i82801gx/lpc.c
parent92185e373ea70b4a9af6fb7f38b0855d7d898bf3 (diff)
downloadcoreboot-b429c5be15dd4263e8ddb599e1e1f15dd95c3bf0.tar.xz
sb/intel/i82801gx: Use common final SPI OPs setup
Change-Id: I30f80c237bccf8dc350249fd12ca6c4559d23d4f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33037 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/i82801gx/lpc.c')
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 846a70997b..6236ebd800 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -33,6 +33,7 @@
#include <drivers/intel/gma/i915.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
#include <southbridge/intel/common/pmbase.h>
+#include <southbridge/intel/common/spi.h>
#include "chip.h"
#include "i82801gx.h"
@@ -621,11 +622,7 @@ static void lpc_final(struct device *dev)
if (!CONFIG(INTEL_CHIPSET_LOCKDOWN))
return;
- SPIBAR16(PREOP) = SPI_OPPREFIX;
- /* Set SPI opcode menu */
- SPIBAR16(OPTYPE) = SPI_OPTYPE;
- SPIBAR32(OPMENU) = SPI_OPMENU_LOWER;
- SPIBAR32(OPMENU + 4) = SPI_OPMENU_UPPER;
+ spi_finalize_ops();
/* Lock SPIBAR */
SPIBAR16(0) = SPIBAR16(0) | (1 << 15);