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author | Arthur Heymans <arthur@aheymans.xyz> | 2018-04-10 12:56:19 +0200 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2018-11-27 12:09:53 +0000 |
commit | 31312b21d147938cb4d88ed90e570ac7804c930d (patch) | |
tree | 57a714d7939d23838e990686b089f9364dc049ef /src/southbridge/intel/i82801gx/nvs.h | |
parent | 516f06e0fb7e4ba4e9ae6c024ab36a079b7cbb76 (diff) | |
download | coreboot-31312b21d147938cb4d88ed90e570ac7804c930d.tar.xz |
sb/intel/i82801gx: Use common Intel SMM code
Use the common Intel code to set up smm and the smihandler. This is
expected to break S3 resume and other smihandler related
functionality as this code is meant to be used with
CONFIG_SMM_TSEG. Platforms (i945, pineview, x4x) using this
southbridge will adapt the CONFIG_SMM_TSEG codepath in subsequent
patches.
Tested on Intel D945GCLF, still boots fine but breaks S3 resume
support because it hangs on SMI.
Change-Id: If7016a3b98fc5f14c287ce800325084f9dc602a0
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/25594
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx/nvs.h')
0 files changed, 0 insertions, 0 deletions