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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-07-26 08:52:10 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-10 18:22:04 +0200 |
| commit | 8aa7e839943560c57d0c39278bfcf3ae3eda29e0 (patch) | |
| tree | 2c6288236e047e20f3c1e75bd2a681b33d02733b /src/southbridge/intel/i82801gx/pcie.c | |
| parent | 9b143e1474f425b6d81bf6490d67baf26d03c437 (diff) | |
| download | coreboot-8aa7e839943560c57d0c39278bfcf3ae3eda29e0.tar.xz | |
intel/i945 intel/i82801gx: remove explicit pcie config accesses
Now that MMCONF_SUPPORT_DEFAULT is enabled by default remove
the pcie explicit accesses. The default config accesses use
MMIO.
Change-Id: I46e69154cf576ddb642c34b6dd2bc0d27cc19b7e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3811
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx/pcie.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/pcie.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index 1bc1bed523..0825dec67f 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c @@ -55,20 +55,17 @@ static void pci_init(struct device *dev) reg32 |= (1 << 3) | (1 << 2) | (1 << 1) | (1 << 0); pci_write_config32(dev, 0xe1, reg32); -#if CONFIG_MMCONF_SUPPORT /* Set VC0 transaction class */ - reg32 = pci_mmio_read_config32(dev, 0x114); + reg32 = pci_read_config32(dev, 0x114); reg32 &= 0xffffff00; reg32 |= 1; - pci_mmio_write_config32(dev, 0x114, reg32); + pci_write_config32(dev, 0x114, reg32); /* Mask completion timeouts */ - reg32 = pci_mmio_read_config32(dev, 0x148); + reg32 = pci_read_config32(dev, 0x148); reg32 |= (1 << 14); - pci_mmio_write_config32(dev, 0x148, reg32); -#else -#error "MMIO needed for ICH7 PCIe" -#endif + pci_write_config32(dev, 0x148, reg32); + /* Enable common clock configuration */ // Are there cases when we don't want that? reg16 = pci_read_config16(dev, 0x50); |