diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-27 05:08:26 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-05-01 11:51:08 +0000 |
| commit | 1234925ad77aa888fb28034251b950e1bc2fd480 (patch) | |
| tree | b3744dffd92a6baaeb11f2302a1e532d2fc2e251 /src/southbridge/intel/i82801gx/usb_ehci.c | |
| parent | 38df060abad3ac105d73fc7425c89571650b40f1 (diff) | |
| download | coreboot-1234925ad77aa888fb28034251b950e1bc2fd480.tar.xz | |
sb/intel/i82801gx: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I11b8743234cb1292db8c930edecf8fb5c47d63fd
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40741
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/i82801gx/usb_ehci.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/usb_ehci.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c index d127496cd6..08211c2f9e 100644 --- a/src/southbridge/intel/i82801gx/usb_ehci.c +++ b/src/southbridge/intel/i82801gx/usb_ehci.c @@ -18,10 +18,7 @@ static void usb_ehci_init(struct device *dev) u8 reg8; printk(BIOS_DEBUG, "EHCI: Setting up controller.. "); - reg32 = pci_read_config32(dev, PCI_COMMAND); - reg32 |= PCI_COMMAND_MASTER; - reg32 |= PCI_COMMAND_SERR; - pci_write_config32(dev, PCI_COMMAND, reg32); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_SERR); reg32 = pci_read_config32(dev, 0xdc); reg32 |= (1 << 31) | (1 << 27); |