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authorNico Huber <nico.h@gmx.de>2020-03-21 18:40:03 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-24 16:43:00 +0000
commite98f6af77bbd2060f01833559034f28b8b88abfe (patch)
tree4bf5961172d0a4013eda8652a65ffa9a95613144 /src/southbridge/intel/i82801gx
parentcc85ce0aa0d6a1e2a254282faf871a8f0a5ffe2f (diff)
downloadcoreboot-e98f6af77bbd2060f01833559034f28b8b88abfe.tar.xz
drivers/intel/gma/acpi: Reduce display switching stubs
_DCS, _DGS and _DSS are required by specification. However, we never implemented them properly, and no OS driver com- plained yet. So we stub them out and keep the traditional behavior in case an OS driver checks for their existence. The old implementations also only returned static values as there never was any write to their GNVS variables. The TRAP() that was called in one place is actually implemented by some ThinkPad's SMI handler as docking event. However, as the call precedes these SMI handlers in coreboot history, it's most likely an accident. Change-Id: Ib0b9fcdd58df254d3b2290900e3bc206a7abd92d Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39726 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
-rw-r--r--src/southbridge/intel/i82801gx/acpi/globalnvs.asl5
-rw-r--r--src/southbridge/intel/i82801gx/nvs.h4
2 files changed, 2 insertions, 7 deletions
diff --git a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
index 5787cec5c2..4a19de1476 100644
--- a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
+++ b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
@@ -16,7 +16,6 @@
/* Global Variables */
Name(\PICM, 0) // IOAPIC/8259
-Name(\DSEN, 1) // Display Output Switching Enable
/* Global ACPI memory region. This region is used for passing information
* between coreboot (aka "the system bios"), ACPI, and the SMI handler.
@@ -88,9 +87,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
TLST, 8, // 0x3d - Display Toggle List pointer
CADL, 8, // 0x3e - Currently Attached Devices List
PADL, 8, // 0x3f - Previously Attached Devices List
- CSTE, 16, // 0x40 - Current display state
- NSTE, 16, // 0x42 - Next display state
- SSTE, 16, // 0x44 - Set display state
+ Offset (0x46),
NDID, 8, // 0x46 - Number of Device IDs
DID1, 32, // 0x47 - Device ID 1
DID2, 32, // 0x4b - Device ID 2
diff --git a/src/southbridge/intel/i82801gx/nvs.h b/src/southbridge/intel/i82801gx/nvs.h
index a0f91cda68..6a178d2f3a 100644
--- a/src/southbridge/intel/i82801gx/nvs.h
+++ b/src/southbridge/intel/i82801gx/nvs.h
@@ -71,9 +71,7 @@ typedef struct {
u8 tlst; /* 0x3d - Display Toggle List Pointer */
u8 cadl; /* 0x3e - currently attached devices */
u8 padl; /* 0x3f - previously attached devices */
- u16 cste; /* 0x40 - current display state */
- u16 nste; /* 0x42 - next display state */
- u16 sste; /* 0x44 - set display state */
+ u16 rsvd14[3];
u8 ndid; /* 0x46 - number of device ids */
u32 did[5]; /* 0x47 - 5b device id 1..5 */
u8 rsvd5[0x9];