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authorPeter Lemenkov <lemenkov@gmail.com>2018-10-23 11:12:46 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-01-14 11:56:38 +0000
commit7b42811fa55bb5ea67c8dc71cd9436cd8ddd83c3 (patch)
tree94dd4dcd1d56127b41b37603c3ef491850b969f5 /src/southbridge/intel/i82801gx
parentaa6d38859768486d3353edd7aef092b6318ac1bf (diff)
downloadcoreboot-7b42811fa55bb5ea67c8dc71cd9436cd8ddd83c3.tar.xz
sb/intel: Use common RCBA MACROs
This commit follows up on commit 2e464cf3 with Change-Id I61fb3b01ff15ba2da2ee938addfa630c282c9870. Change-Id: Iaf06d347e2da5680816b17f49523ac1a687798ba Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/c/29236 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: David Guckian Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 9fd9fd6273..395cdd13cf 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -184,9 +184,6 @@ int southbridge_detect_s3_resume(void);
#define PMBASE 0x40
-/* Root Complex Register Block */
-#define RCBA 0xf0
-
#define VCH 0x0000 /* 32bit */
#define VCAP1 0x0004 /* 32bit */
#define VCAP2 0x0008 /* 32bit */