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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-01-07 18:17:32 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-28 22:29:18 +0200 |
| commit | c6be0d854a99120e0faa224af23e25679790c419 (patch) | |
| tree | c17c56909e1f2855ee521484cf86bb00bd87548e /src/southbridge/intel/i82801gx | |
| parent | f4b9b41c475b5c2c212e619d5c6f391204578b41 (diff) | |
| download | coreboot-c6be0d854a99120e0faa224af23e25679790c419.tar.xz | |
amd/pi/hudson: Add alternate method for including amdfw
For systems using Chrome OS, place the amdfw outside of cbfs control.
The firmware must go to a fixed position at an offset of 0x20000 into
the flash device.
Potentially improve by adding a warning or error message for the
condition when sizeof(amdfw) + sizeof(cbfs and metadata) > sizeof(flash).
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit 2d9d631b39d7850576438a5b0979936bd33893e1)
Change-Id: I38029bc03e5db260424cca293b1a7bceea4d0d75
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/18435
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
0 files changed, 0 insertions, 0 deletions