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authorElyes HAOUAS <ehaouas@noos.fr>2020-08-11 09:39:43 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-08-17 07:00:37 +0000
commita4dd33cc8b52f686908590bb41b1c69a9b6c5db5 (patch)
tree95cf94c3ff438647096ff3300f0972b2f5b797e3 /src/southbridge/intel/i82801gx
parenta3022056a2d16b92cc0cdf5eafa4e6369c09e716 (diff)
downloadcoreboot-a4dd33cc8b52f686908590bb41b1c69a9b6c5db5.tar.xz
src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers
Change-Id: Id3390c5ac6a9517ffc2d202f41802e6f4d2e314c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44371 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
-rw-r--r--src/southbridge/intel/i82801gx/smbus.c9
-rw-r--r--src/southbridge/intel/i82801gx/usb_ehci.c3
2 files changed, 7 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c
index 6b63959d6a..9624b9862f 100644
--- a/src/southbridge/intel/i82801gx/smbus.c
+++ b/src/southbridge/intel/i82801gx/smbus.c
@@ -4,6 +4,7 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/smbus_host.h>
#include "i82801gx.h"
@@ -16,7 +17,7 @@ static int lsmbus_read_byte(struct device *dev, u8 address)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_read_byte(res->base, device, address);
}
@@ -29,7 +30,7 @@ static int lsmbus_write_byte(struct device *dev, u8 address, u8 data)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_write_byte(res->base, device, address, data);
}
@@ -41,7 +42,7 @@ static int lsmbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *bu
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_block_write(res->base, device, cmd, bytes, buf);
}
@@ -53,7 +54,7 @@ static int lsmbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buf)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_block_read(res->base, device, cmd, bytes, buf);
}
diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c
index 0a66136d03..b01af96c60 100644
--- a/src/southbridge/intel/i82801gx/usb_ehci.c
+++ b/src/southbridge/intel/i82801gx/usb_ehci.c
@@ -7,6 +7,7 @@
#include "i82801gx.h"
#include <device/pci_ehci.h>
#include <device/mmio.h>
+#include <device/pci_def.h>
#include <device/pci_ops.h>
static void usb_ehci_init(struct device *dev)
@@ -23,7 +24,7 @@ static void usb_ehci_init(struct device *dev)
pci_update_config32(dev, 0xfc, ~(3 << 2), (2 << 2) | (1 << 29) | (1 << 17));
/* Clear any pending port changes */
- res = find_resource(dev, 0x10);
+ res = find_resource(dev, PCI_BASE_ADDRESS_0);
base = res2mmio(res, 0, 0);
reg32 = read32(base + 0x24) | (1 << 2);
write32(base + 0x24, reg32);