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| author | Subrata Banik <subrata.banik@intel.com> | 2019-03-20 15:09:44 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-21 16:19:34 +0000 |
| commit | 15ccbf042ddda877cde23e9b0d5d3f5256e62c33 (patch) | |
| tree | 66e2cfdad792dee5b8a66f68135629351635277b /src/southbridge/intel/i82801gx | |
| parent | 9514d47d3c7296ff98bb7a590e36ee548b40e369 (diff) | |
| download | coreboot-15ccbf042ddda877cde23e9b0d5d3f5256e62c33.tar.xz | |
{northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()
This patch removes all local definitions of sub_system functions and make
use of common generic pci_dev_set_subsystem() from PCI bridge and Cardbus
devices as well.
Change-Id: I5fbed39ed448baf11f0e0786ce0ee94741d57237
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
| -rw-r--r-- | src/southbridge/intel/i82801gx/pcie.c | 16 |
1 files changed, 1 insertions, 15 deletions
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index 9446527c7b..3e5dbc3e87 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c @@ -252,22 +252,8 @@ static void ich_pcie_enable(struct device *dev) root_port_commit_config(dev); } - -static void pcie_set_subsystem(struct device *dev, unsigned int vendor, - unsigned int device) -{ - /* NOTE: This is not the default position! */ - if (!vendor || !device) { - pci_write_config32(dev, 0x94, - pci_read_config32(dev, 0)); - } else { - pci_write_config32(dev, 0x94, - ((device & 0xffff) << 16) | (vendor & 0xffff)); - } -} - static struct pci_operations pci_ops = { - .set_subsystem = pcie_set_subsystem, + .set_subsystem = pci_dev_set_subsystem, }; static struct device_operations device_ops = { |