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authorArthur Heymans <arthur@aheymans.xyz>2019-11-25 23:26:36 +0100
committerNico Huber <nico.h@gmx.de>2019-12-14 15:34:08 +0000
commitb17a0f592c4d725958539a089df0f9b22ac2d7e2 (patch)
tree6485345a2c8a8c3385264d778d4e210a6124bdd9 /src/southbridge/intel/i82801gx
parentde640781020b10e72dd6a5cda26cab10932e94fe (diff)
downloadcoreboot-b17a0f592c4d725958539a089df0f9b22ac2d7e2.tar.xz
sb/intel/*: Remove romcc guards
These platforms now use a GCC compiled bootblock. Change-Id: I9a0139f497fe84860664195ed6584f90daecec16 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37217 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 3d27faafad..0516a7a171 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -34,10 +34,8 @@
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
-#ifndef __ROMCC__
#include <device/device.h>
void i82801gx_enable(struct device *dev);
-#endif
void enable_smbus(void);
void i82801gx_lpc_setup(void);