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| author | Johnny Lin <johnny_lin@wiwynn.com> | 2020-04-20 19:03:41 +0800 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-24 09:46:10 +0000 |
| commit | f9e12e82f75448c557ce5dc840b4a33eae63a342 (patch) | |
| tree | 433e59037ababc9c6534e4affff86aae49352a72 /src/southbridge/intel/i82801gx | |
| parent | 46c2d91a796a7e0b0dd818d292d1e064982d555a (diff) | |
| download | coreboot-f9e12e82f75448c557ce5dc840b4a33eae63a342.tar.xz | |
mb/ocp/tiogapass: Populate SMBIOS data and set the read PPIN to BMC
1. Populate SMBIOS data from OCP_DMI driver read from FRU
2. Set the read PPIN MSR for CPU0 and CPU1 to BMC, selecting
PARALLEL_MP_AP_WORK to enable OCP DMI driver to read remote socket PPIN.
Tested on OCP Tioga Pass.
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Change-Id: Ie11ab68267438ea9c669c809985c0c2d7578280e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40524
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
0 files changed, 0 insertions, 0 deletions