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| author | Patrick Georgi <patrick.georgi@secunet.com> | 2012-11-06 11:05:09 +0100 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-11-27 09:16:58 +0100 |
| commit | e72a8a3047c535bda03aecce2eca134608d1a93c (patch) | |
| tree | 24d0980742dfa5aba5c286c6d2236cfed0ff92f6 /src/southbridge/intel/i82801ix/Kconfig | |
| parent | 2efc8808b8bfaee0a0e8f3ee387ecd9a3f049705 (diff) | |
| download | coreboot-e72a8a3047c535bda03aecce2eca134608d1a93c.tar.xz | |
intel/i82801ix: new southbridge, ICH9
Add support for ICH9 southbridge
Change-Id: I70612431101bf48d9dcc96ee1b37d257c9ad2ee2
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1690
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/intel/i82801ix/Kconfig')
| -rw-r--r-- | src/southbridge/intel/i82801ix/Kconfig | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig new file mode 100644 index 0000000000..ec30af8e76 --- /dev/null +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -0,0 +1,48 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2008-2009 coresystems GmbH +## 2012 secunet security Networks AG +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config SOUTHBRIDGE_INTEL_I82801IX + bool + select IOAPIC + select HAVE_USBDEBUG + select HAVE_HARD_RESET + select USE_WATCHDOG_ON_BOOT + select HAVE_SMI_HANDLER + +if SOUTHBRIDGE_INTEL_I82801IX + +config EHCI_BAR + hex + default 0xfef00000 + +config EHCI_DEBUG_OFFSET + hex + default 0xa0 + +config USBDEBUG_DEFAULT_PORT + int + default 1 + +config BOOTBLOCK_SOUTHBRIDGE_INIT + string + default "southbridge/intel/i82801ix/bootblock.c" + +endif + |