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authorAngel Pons <th3fanbus@gmail.com>2020-06-08 11:13:42 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-06-12 01:10:17 +0000
commit6740647cfd2d8ff8840d1e2ab37b66ce14b19180 (patch)
treed2486eca3a88ef1141aaeba3d0774df247483d83 /src/southbridge/intel/i82801ix/hdaudio.c
parente36733bf849e781d6e86a7549f2c17d246e619ac (diff)
downloadcoreboot-6740647cfd2d8ff8840d1e2ab37b66ce14b19180.tar.xz
sb/intel/i82801ix: Use PCI bitwise ops
Tested with BUILD_TIMELESS=1, Roda RK9 does not change. Change-Id: Ie05f484cf4b346601e6128c95ff2b27ce59b995f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42188 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix/hdaudio.c')
-rw-r--r--src/southbridge/intel/i82801ix/hdaudio.c35
1 files changed, 8 insertions, 27 deletions
diff --git a/src/southbridge/intel/i82801ix/hdaudio.c b/src/southbridge/intel/i82801ix/hdaudio.c
index 5eb907ec3b..6f82cb4e00 100644
--- a/src/southbridge/intel/i82801ix/hdaudio.c
+++ b/src/southbridge/intel/i82801ix/hdaudio.c
@@ -212,49 +212,30 @@ static void azalia_init(struct device *dev)
u8 *base;
struct resource *res;
u32 codec_mask;
- u8 reg8;
- u32 reg32;
// ESD
- reg32 = pci_read_config32(dev, 0x134);
- reg32 &= 0xff00ffff;
- reg32 |= (2 << 16);
- pci_write_config32(dev, 0x134, reg32);
+ pci_update_config32(dev, 0x134, ~0x00ff0000, 2 << 16);
// Link1 description
- reg32 = pci_read_config32(dev, 0x140);
- reg32 &= 0xff00ffff;
- reg32 |= (2 << 16);
- pci_write_config32(dev, 0x140, reg32);
+ pci_update_config32(dev, 0x140, ~0x00ff0000, 2 << 16);
// Port VC0 Resource Control Register
- reg32 = pci_read_config32(dev, 0x114);
- reg32 &= 0xffffff00;
- reg32 |= 1;
- pci_write_config32(dev, 0x114, reg32);
+ pci_update_config32(dev, 0x114, ~0x000000ff, 1);
// VCi traffic class
- reg8 = pci_read_config8(dev, 0x44);
- reg8 |= (7 << 0); // TC7
- pci_write_config8(dev, 0x44, reg8);
+ pci_or_config8(dev, 0x44, 7 << 0); // TC7
// VCi Resource Control
- reg32 = pci_read_config32(dev, 0x120);
- reg32 |= (1 << 31);
- reg32 |= (1 << 24); // VCi ID
- reg32 |= (0x80 << 0); // VCi map
- pci_write_config32(dev, 0x120, reg32);
+ pci_or_config32(dev, 0x120, (1 << 31) | (1 << 24) | (0x80 << 0)); /* VCi ID and map */
/* Set Bus Master */
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
- reg8 = pci_read_config8(dev, 0x4d); // Docking Status
- reg8 &= ~(1 << 7); // Docking not supported
- pci_write_config8(dev, 0x4d, reg8);
+ // Docking not supported
+ pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
/* Lock some R/WO bits by writing their current value. */
- reg32 = pci_read_config32(dev, 0x74);
- pci_write_config32(dev, 0x74, reg32);
+ pci_update_config32(dev, 0x74, ~0, 0);
res = find_resource(dev, 0x10);
if (!res)