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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-25 11:40:00 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-12-11 08:57:41 +0100 |
| commit | a6ac1877316216c8c56a9ab04b9ac3cde6ab01aa (patch) | |
| tree | 68b39f9c23f7c6bd9ac19c2daa75f58ae057f1e8 /src/southbridge/intel/i82801ix/i82801ix.h | |
| parent | 823020d56be1bf6425b4e433a1f1c2bbc2c4c90b (diff) | |
| download | coreboot-a6ac1877316216c8c56a9ab04b9ac3cde6ab01aa.tar.xz | |
intel/gm45: Use romstage_handoff for S3
Don't use scratchpad registers when we have romstage_handoff
to pass S3 resume flag. Also fixes console log from reporting
early in ramstage "Normal boot" while on S3 resume path.
Change-Id: I4e2eabc59ff87b7ed40cfc9885bbe0256fe4a695
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17674
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix/i82801ix.h')
| -rw-r--r-- | src/southbridge/intel/i82801ix/i82801ix.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index afe4aa7064..af4efcdb30 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -218,10 +218,6 @@ #define FD_SAD1 (1 << 2) /* SATA #1 */ -#define SKPAD_ACPI_S3_MAGIC 0xcafed00d -#define SKPAD_NORMAL_BOOT_MAGIC 0xcafebabe - - #ifndef __ACPI__ #ifndef __ASSEMBLER__ |