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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-18 16:33:39 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-21 07:00:45 +0000
commit12b121cdb450d96309dd96b2ccc25fc5501d2250 (patch)
tree1d94c123c23512b811d69d9876ac9a860bbbe0f6 /src/southbridge/intel/i82801ix/i82801ix.h
parent544b572c07bb09aba36705b5d8ffca3b793323f6 (diff)
downloadcoreboot-12b121cdb450d96309dd96b2ccc25fc5501d2250.tar.xz
southbridge/intel: Tidy up preprocessor and headers
Change-Id: I52a7b39566acd64ac21a345046675e05649a40f5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34980 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix/i82801ix.h')
-rw-r--r--src/southbridge/intel/i82801ix/i82801ix.h11
1 files changed, 3 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h
index 31eabb6e42..afaaade82d 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.h
+++ b/src/southbridge/intel/i82801ix/i82801ix.h
@@ -18,12 +18,6 @@
#ifndef SOUTHBRIDGE_INTEL_I82801GX_I82801IX_H
#define SOUTHBRIDGE_INTEL_I82801GX_I82801IX_H
-#ifndef __ACPI__
-#ifndef __ASSEMBLER__
-#include "chip.h"
-#endif
-#endif
-
#define DEFAULT_TBAR ((u8 *)0xfed1b000)
#include <southbridge/intel/common/rcba.h>
@@ -214,12 +208,13 @@ static inline int lpc_is_mobile(const u16 devid)
void aseg_smm_lock(void);
-#if defined(__PRE_RAM__)
void enable_smbus(void);
-int smbus_read_byte(unsigned device, unsigned address);
void i82801ix_early_init(void);
void i82801ix_dmi_setup(void);
void i82801ix_dmi_poll_vc1(void);
+
+#if ENV_ROMSTAGE
+int smbus_read_byte(unsigned device, unsigned address);
#endif
#endif