summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801ix/lpc.c
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-26 20:47:47 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-06-04 11:19:01 +0200
commitd0e212cdce76b42090325f429e7bd78e0b1a9bb5 (patch)
treee4f423a12bcce87ce93f79874df83f517312fbb6 /src/southbridge/intel/i82801ix/lpc.c
parent6ccf119932661eaf63af0ee3a276a6d2f2f27b89 (diff)
downloadcoreboot-d0e212cdce76b42090325f429e7bd78e0b1a9bb5.tar.xz
devicetree: Discriminate device ops scan_bus()
Use of scan_static_bus() and tree traversals is somewhat convoluted. Start cleaning this up by assigning each path type with separate static scan_bus() function. For ME, SMBus and LPC paths a bus cannot expose bridges, as those would add to the number of encountered PCI buses. Change-Id: I8bb11450516faad4fa33b8f69bce5b9978ec75e5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8534 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Diffstat (limited to 'src/southbridge/intel/i82801ix/lpc.c')
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 3cc053b19f..8713e55881 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -582,7 +582,7 @@ static struct device_operations device_ops = {
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,
};