diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-06-08 11:13:42 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-12 01:10:17 +0000 |
commit | 6740647cfd2d8ff8840d1e2ab37b66ce14b19180 (patch) | |
tree | d2486eca3a88ef1141aaeba3d0774df247483d83 /src/southbridge/intel/i82801ix/lpc.c | |
parent | e36733bf849e781d6e86a7549f2c17d246e619ac (diff) | |
download | coreboot-6740647cfd2d8ff8840d1e2ab37b66ce14b19180.tar.xz |
sb/intel/i82801ix: Use PCI bitwise ops
Tested with BUILD_TIMELESS=1, Roda RK9 does not change.
Change-Id: Ie05f484cf4b346601e6128c95ff2b27ce59b995f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42188
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix/lpc.c')
-rw-r--r-- | src/southbridge/intel/i82801ix/lpc.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 855d7cc7f9..11c153f4e7 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -276,18 +276,13 @@ static void i82801ix_power_options(struct device *dev) static void i82801ix_configure_cstates(struct device *dev) { - u8 reg8; - - reg8 = pci_read_config8(dev, D31F0_CxSTATE_CNF); - reg8 |= (1 << 4) | (1 << 3) | (1 << 2); // Enable Popup & Popdown - pci_write_config8(dev, D31F0_CxSTATE_CNF, reg8); + // Enable Popup & Popdown + pci_or_config8(dev, D31F0_CxSTATE_CNF, (1 << 4) | (1 << 3) | (1 << 2)); // Set Deeper Sleep configuration to recommended values - reg8 = pci_read_config8(dev, D31F0_C4TIMING_CNT); - reg8 &= 0xf0; - reg8 |= (2 << 2); // Deeper Sleep to Stop CPU: 34-40us - reg8 |= (2 << 0); // Deeper Sleep to Sleep: 15us - pci_write_config8(dev, D31F0_C4TIMING_CNT, reg8); + // Deeper Sleep to Stop CPU: 34-40us + // Deeper Sleep to Sleep: 15us + pci_update_config8(dev, D31F0_C4TIMING_CNT, ~0x0f, (2 << 2) | (2 << 0)); /* We could enable slow-C4 exit here, if someone needs it? */ } |