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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-07 12:00:31 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-01-14 18:13:15 +0000
commit1cfafe25e37d3a396a19bfe524af16284ff41070 (patch)
treefa48bc17e9070649105b4ee48ffd7c20700e6332 /src/southbridge/intel/i82801ix
parent7adc370dc79af1aacd6f811b9b28d01d595da702 (diff)
downloadcoreboot-1cfafe25e37d3a396a19bfe524af16284ff41070.tar.xz
intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() call
Change-Id: Idc7631abb550b31af722ccf3b69afdc01fdb616e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38268 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix')
-rw-r--r--src/southbridge/intel/i82801ix/early_init.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c
index 92db7d833c..4ce4fbebc4 100644
--- a/src/southbridge/intel/i82801ix/early_init.c
+++ b/src/southbridge/intel/i82801ix/early_init.c
@@ -23,6 +23,9 @@ void i82801ix_early_init(void)
{
const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0);
+ if (ENV_ROMSTAGE)
+ enable_smbus();
+
/* Set up RCBA. */
pci_write_config32(d31f0, RCBA, (uintptr_t)DEFAULT_RCBA | 1);