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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-29 05:57:12 +0300 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-04 23:15:46 +0000 |
commit | 8c2cc68b1ac9e1fb2011bcb669df04b4c8cad351 (patch) | |
tree | d58be6725fbfc4c15034a630afdb8262e2fca84e /src/southbridge/intel/i82801ix | |
parent | c5a3a4a602f938dbc6e2e63c96522e0b74b6c814 (diff) | |
download | coreboot-8c2cc68b1ac9e1fb2011bcb669df04b4c8cad351.tar.xz |
arch/x86: Pass GNVS as parameter to SMM module
Change-Id: I9d7417462830443f9c96273d2cc326cbcc3b17dd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48698
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix')
-rw-r--r-- | src/southbridge/intel/i82801ix/lpc.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ix/smihandler.c | 4 |
2 files changed, 0 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 652da54103..821a0b7386 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -461,8 +461,6 @@ void southbridge_inject_dsdt(const struct device *dev) memset(gnvs, 0, sizeof(*gnvs)); acpi_create_gnvs(gnvs); - /* And tell SMI about it */ - apm_control(APM_CNT_GNVS_UPDATE); /* Add it to SSDT. */ acpigen_write_scope("\\"); diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c index 537e544f94..046cc2b5d5 100644 --- a/src/southbridge/intel/i82801ix/smihandler.c +++ b/src/southbridge/intel/i82801ix/smihandler.c @@ -14,10 +14,6 @@ struct global_nvs *gnvs; #endif -/* This implementation was removed since it was invalid. There will be one shared - approach to set GNVS pointer into SMM without the 0xEA PM Trap mentioned above. */ -void southbridge_update_gnvs(u8 apm_cnt, int *smm_done) { } - int southbridge_io_trap_handler(int smif) { switch (smif) { |