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| author | Nico Huber <nico.h@gmx.de> | 2018-11-14 00:00:35 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-01-06 15:54:19 +0000 |
| commit | 9faae2b939d0c83632baeefe80bef1739e125018 (patch) | |
| tree | a3d62f5f14994f1facc2389d189796a836bd8e81 /src/southbridge/intel/i82801ix | |
| parent | d2f678d3bd6ca4c05fa5c652d6cdf4623543e576 (diff) | |
| download | coreboot-9faae2b939d0c83632baeefe80bef1739e125018.tar.xz | |
Kconfig: Unify power-after-failure options
The newest and most useful incarnation was hiding in soc/intel/common/.
We move it into the Mainboard menu and extend it with various flags to
be selected to control the default and which options are visible. Also
add a new `int` config MAINBOARD_POWER_FAILURE_STATE that moves the
boolean to int conversion into Kconfig:
0 - S5
1 - S0
2 - previous state
This patch focuses on the Kconfig code. The C code could be unified as
well, e.g. starting with a common enum and safe wrapper around the
get_option() call.
TEST=Did what-jenkins-does with and without this commit and compared
binaries. Nothing changed for the default configurations.
Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/29680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/intel/i82801ix')
| -rw-r--r-- | src/southbridge/intel/i82801ix/i82801ix.h | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/lpc.c | 2 |
2 files changed, 1 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index aed1999054..f094ed8920 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -85,11 +85,6 @@ #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 -#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL -#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON -#endif - - /* D31:F0 LPC bridge */ #define D31F0_PMBASE 0x40 #define D31F0_ACPI_CNTL 0x44 diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index b809a4e3b7..dd37a0bd74 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -170,7 +170,7 @@ static void i82801ix_power_options(struct device *dev) /* Get the chip configuration */ config_t *config = dev->chip_info; - int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; + int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE; int nmi_option; /* BIOS must program... */ |