summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801ix
diff options
context:
space:
mode:
authorMartin Roth <martinroth@google.com>2018-05-07 20:45:21 -0500
committerPatrick Georgi <pgeorgi@google.com>2018-05-09 10:14:27 +0000
commit621e4d8b48a1485ff6457524af88b3da55e604cb (patch)
treeae6e60a14375514f06fddae96a1d712337d9b7ce /src/southbridge/intel/i82801ix
parent49a4c6af58c506e95c7ac70b4e759b34f80613d0 (diff)
downloadcoreboot-621e4d8b48a1485ff6457524af88b3da55e604cb.tar.xz
src/southbridge: Serialize methods with named objects inside
Change-Id: Ia9d884d7247f0cc3a175de31649d0163c69f1299 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/26152 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801ix')
-rw-r--r--src/southbridge/intel/i82801ix/acpi/sata.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801ix/acpi/sata.asl b/src/southbridge/intel/i82801ix/acpi/sata.asl
index 3d2fd3f7cb..ad4883219c 100644
--- a/src/southbridge/intel/i82801ix/acpi/sata.asl
+++ b/src/southbridge/intel/i82801ix/acpi/sata.asl
@@ -28,7 +28,7 @@ Device (AHC1)
Name (_ADR, 0)
// Get Timing Mode
- Method (_GTM)
+ Method (_GTM, 0, Serialized)
{
Name(PBUF, Buffer(20) {
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -87,7 +87,7 @@ Device (AHC2)
Name (_ADR, 0)
// Get Timing Mode
- Method (_GTM)
+ Method (_GTM, 0, Serialized)
{
Name(PBUF, Buffer(20) {
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,