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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-01 22:08:18 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-07 12:59:28 +0100
commit6f66f414a0907f79abf492cd9eca839c0849c7f6 (patch)
tree3e74145128261014798af58111db31d616fd43dd /src/southbridge/intel/i82801ix
parent891b6c4d199418a08ba88e42d6c8945ce05205f1 (diff)
downloadcoreboot-6f66f414a0907f79abf492cd9eca839c0849c7f6.tar.xz
PCI ops: MMCONF_SUPPORT_DEFAULT is required
Doing PCI config operations via MMIO window by default is a requirement, if supported by the platform. This means chipset or CPU code must enable MMCONF operations early in bootblock already, or before platform-specific romstage entry. Platforms are allowed to have NO_MMCONF_SUPPORT only in the case it is actually not implemented in the silicon. Change-Id: Id4d9029dec2fe195f09373320de800fcdf88c15d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17693 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix')
-rw-r--r--src/southbridge/intel/i82801ix/i82801ix.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801ix/i82801ix.c b/src/southbridge/intel/i82801ix/i82801ix.c
index f02429a3bd..0f3a08c9cf 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.c
+++ b/src/southbridge/intel/i82801ix/i82801ix.c
@@ -23,10 +23,6 @@
#include <console/console.h>
#include "i82801ix.h"
-#if !CONFIG_MMCONF_SUPPORT_DEFAULT
-#error ICH9 requires CONFIG_MMCONF_SUPPORT_DEFAULT
-#endif
-
typedef struct southbridge_intel_i82801ix_config config_t;
static void i82801ix_enable_device(device_t dev)